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x86_64 specific assembly version of field code
This commit is contained in:
Diederik Huys
parent
0cd6372fe8
commit
37c4ab156d
5 changed files with 471 additions and 12 deletions
18
Makefile
18
Makefile
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@ -1,10 +1,11 @@
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FLAGS_COMMON:=-Wall
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FLAGS_PROD:=-DNDEBUG -g0 -O3 -march=native
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FLAGS_PROD:=-DNDEBUG -O2 -march=native
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FLAGS_DEBUG:=-DVERIFY_MAGNITUDE -ggdb3 -O1
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FLAGS_TEST:=-DVERIFY_MAGNITUDE -ggdb3 -O3 -march=native
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FLAGS_TEST:=-DVERIFY_MAGNITUDE -ggdb3 -O2 -march=native
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SECP256K1_FILES := num.h field.h group.h ecmult.h ecdsa.h \
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num.cpp field.cpp group.cpp ecmult.cpp ecdsa.cpp \
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lin64.asm
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ifndef CONF
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CONF := gmp
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@ -22,7 +23,7 @@ SECP256K1_FILES := $(SECP256K1_FILES) num_gmp.h num_gmp.cpp
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endif
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endif
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all: *.cpp *.h
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all: *.cpp *.asm *.h
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+make CONF=openssl all-openssl
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+make CONF=gmp all-gmp
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@ -41,8 +42,11 @@ clean-$(CONF):
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obj/secp256k1-$(CONF).o: $(SECP256K1_FILES)
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$(CXX) $(FLAGS_COMMON) $(FLAGS_PROD) $(FLAGS_CONF) secp256k1.cpp -c -o obj/secp256k1-$(CONF).o
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bench-$(CONF): obj/secp256k1-$(CONF).o bench.cpp
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$(CXX) $(FLAGS_COMMON) $(FLAGS_PROD) $(FLAGS_CONF) obj/secp256k1-$(CONF).o bench.cpp $(LIBS) -o bench-$(CONF)
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obj/lin64.o: lin64.asm
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~/tmp/jwasm -Fo obj/lin64.o -elf64 lin64.asm
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tests-$(CONF): $(SECP256K1_FILES) tests.cpp
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$(CXX) $(FLAGS_COMMON) $(FLAGS_TEST) $(FLAGS_CONF) tests.cpp $(LIBS) -o tests-$(CONF)
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bench-$(CONF): obj/secp256k1-$(CONF).o bench.cpp obj/lin64.o
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$(CXX) $(FLAGS_COMMON) $(FLAGS_PROD) $(FLAGS_CONF) obj/secp256k1-$(CONF).o obj/lin64.o bench.cpp $(LIBS) -o bench-$(CONF)
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tests-$(CONF): $(SECP256K1_FILES) tests.cpp obj/lin64.o
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$(CXX) $(FLAGS_COMMON) $(FLAGS_TEST) $(FLAGS_CONF) obj/lin64.o tests.cpp $(LIBS) -o tests-$(CONF)
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21
field.cpp
21
field.cpp
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@ -3,11 +3,13 @@ using namespace std;
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#include <assert.h>
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#include <stdint.h>
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#include <string>
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#define INLINE_ASM
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#include "lin64.h"
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#include "num.h"
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#include "field.h"
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#include <iostream>
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// #define VERIFY_MAGNITUDE 1
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using namespace std;
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namespace secp256k1 {
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@ -164,7 +166,11 @@ void FieldElem::SetMult(const FieldElem &a, const FieldElem &b) {
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assert(a.magnitude <= 8);
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assert(b.magnitude <= 8);
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#endif
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__int128 c = (__int128)a.n[0] * b.n[0];
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#ifdef INLINE_ASM
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_ExSetMult((uint64_t *) a.n,(uint64_t *) b.n, (uint64_t *) n);
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#else
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unsigned __int128 c = (__int128)a.n[0] * b.n[0];
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uint64_t t0 = c & 0xFFFFFFFFFFFFFULL; c = c >> 52; // c max 0FFFFFFFFFFFFFE0
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c = c + (__int128)a.n[0] * b.n[1] +
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(__int128)a.n[1] * b.n[0];
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@ -199,8 +205,8 @@ void FieldElem::SetMult(const FieldElem &a, const FieldElem &b) {
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c = c + (__int128)a.n[4] * b.n[4];
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uint64_t t8 = c & 0xFFFFFFFFFFFFFULL; c = c >> 52; // c max 001000000000001E
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uint64_t t9 = c;
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c = t0 + (__int128)t5 * 0x1000003D10ULL;
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c = t0 + (__int128)t5 * 0x1000003D10ULL;
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t0 = c & 0xFFFFFFFFFFFFFULL; c = c >> 52; // c max 0000001000003D10
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c = c + t1 + (__int128)t6 * 0x1000003D10ULL;
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t1 = c & 0xFFFFFFFFFFFFFULL; c = c >> 52; // c max 0000001000003D10
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@ -213,6 +219,7 @@ void FieldElem::SetMult(const FieldElem &a, const FieldElem &b) {
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c = t0 + (__int128)c * 0x1000003D1ULL;
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n[0] = c & 0xFFFFFFFFFFFFFULL; c = c >> 52; // c max 1000008
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n[1] = t1 + c;
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#endif
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#ifdef VERIFY_MAGNITUDE
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magnitude = 1;
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normalized = false;
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@ -223,6 +230,10 @@ void FieldElem::SetSquare(const FieldElem &a) {
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#ifdef VERIFY_MAGNITUDE
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assert(a.magnitude <= 8);
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#endif
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#ifdef INLINE_ASM
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_ExSetSquare((uint64_t *)a.n,(uint64_t *)n);
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#else
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__int128 c = (__int128)a.n[0] * a.n[0];
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uint64_t t0 = c & 0xFFFFFFFFFFFFFULL; c = c >> 52; // c max 0FFFFFFFFFFFFFE0
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c = c + (__int128)(a.n[0]*2) * a.n[1];
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@ -261,6 +272,8 @@ void FieldElem::SetSquare(const FieldElem &a) {
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c = t0 + (__int128)c * 0x1000003D1ULL;
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n[0] = c & 0xFFFFFFFFFFFFFULL; c = c >> 52; // c max 1000008
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n[1] = t1 + c;
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#endif
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#ifdef VERIFY_MAGNITUDE
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assert(a.magnitude <= 8);
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normalized = false;
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2
field.h
2
field.h
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@ -13,7 +13,7 @@ using namespace std;
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namespace secp256k1 {
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/** Implements arithmetic modulo FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFE FFFFFC2F,
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* represented as 5 uint64_t's in base 2^52. The values are allowed to contain >52 each. In particular,
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* represented as 5 uint64_t's in base 2^52. he values are allowed to contain >52 each. In particular,
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* each FieldElem has a 'magnitude' associated with it. Internally, a magnitude M means each element
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* is at most M*(2^53-1), except the most significant one, which is limited to M*(2^49-1). All operations
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* accept any input with magnitude at most M, and have different rules for propagating magnitude to their
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432
lin64.asm
Normal file
432
lin64.asm
Normal file
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@ -0,0 +1,432 @@
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.x64
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QTEST EQU 1
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.code
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;; Register Layout:
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;; INPUT: rdi = a.n
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;; rsi = b.n
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;; rdx = this.a
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;; OUTPUT: [rbx]
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;; INTERNAL: rdx:rax = multiplication accumulator
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;; rsi = b.n / t9
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;; r8:r9 = c
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;; r10-r15 = t0-t5
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;; rbx = t6
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;; rcx = t7
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;; rbp = t8
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ExSetMult PROC C PUBLIC USES rbx rbp r12 r13 r14 r15
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push rdx
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mov r14,[rsi+8*0]
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;; c=a.n[0] * b.n[0]
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mov rax,[rdi+0*8]
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mov rbp,0FFFFFFFFFFFFFh
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mul r14 ; rsi=b.n[0]
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mov r15,[rsi+1*8]
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mov r10,rbp
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mov r8,rax
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and r10,rax ; only need lower qword
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shrd r8,rdx,52
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xor r9,r9
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;; c+=a.n[0] * b.n[1] + a.n[1] * b.n[0]
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mov rax,[rdi+0*8]
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mul r15 ; b.n[1]
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+1*8]
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mul r14 ; b.n[0]
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mov r11,rbp
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mov rbx,[rsi+2*8]
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add r8,rax
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adc r9,rdx
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and r11,r8
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shrd r8,r9,52
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xor r9,r9
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;; c+=a.n[0 1 2] * b.n[2 1 0]
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mov rax,[rdi+0*8]
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mul rbx ; b.n[2]
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+1*8]
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mul r15 ; b.n[1]
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+2*8]
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mul r14
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mov r12,rbp ; modulus
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mov rcx,[rsi+3*8]
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add r8,rax
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adc r9,rdx
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and r12,r8 ; only need lower dword
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shrd r8,r9,52
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xor r9,r9
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;; c+=a.n[0 1 2 3] * b.n[3 2 1 0]
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mov rax,[rdi+0*8]
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mul rcx ; b.n[3]
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+1*8]
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mul rbx ; b.n[2]
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+2*8]
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mul r15 ; b.n[1]
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+3*8]
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mul r14 ; b.n[0]
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mov r13,rbp ; modulus
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mov rsi,[rsi+4*8] ; load b.n[4] and destroy pointer
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add r8,rax
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adc r9,rdx
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and r13,r8
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shrd r8,r9,52
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xor r9,r9
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;; c+=a.n[0 1 2 3 4] * b.n[4 3 2 1 0]
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mov rax,[rdi+0*8]
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mul rsi
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+1*8]
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mul rcx
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+2*8]
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mul rbx ; b.n[2]
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+3*8]
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mul r15 ; b.n[1]
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+4*8]
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mul r14 ; b.n[0]
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mov r14,rbp ; modulus
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add r8,rax
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adc r9,rdx
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and r14,r8
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shrd r8,r9,52
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xor r9,r9
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;; c+=a.n[1 2 3 4] * b.n[4 3 2 1]
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mov rax,[rdi+1*8]
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mul rsi
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+2*8]
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mul rcx
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+3*8]
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mul rbx
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+4*8]
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mul r15
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mov r15,rbp ; modulus
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add r8,rax
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adc r9,rdx
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and r15,r8
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shrd r8,r9,52
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xor r9,r9
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;; c+=a.n[2 3 4] * b.n[4 3 2]
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mov rax,[rdi+2*8]
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mul rsi
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+3*8]
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mul rcx
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+4*8]
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mul rbx
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mov rbx,rbp ; modulus
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add r8,rax
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adc r9,rdx
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and rbx,r8 ; only need lower dword
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shrd r8,r9,52
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xor r9,r9
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;; c+=a.n[3 4] * b.n[4 3]
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mov rax,[rdi+3*8]
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mul rsi
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add r8,rax
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adc r9,rdx
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mov rax,[rdi+4*8]
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mul rcx
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mov rcx,rbp ; modulus
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add r8,rax
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adc r9,rdx
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and rcx,r8 ; only need lower dword
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shrd r8,r9,52
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xor r9,r9
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;; c+=a.n[4] * b.n[4]
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mov rax,[rdi+4*8]
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mul rsi
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;; mov rbp,rbp ; modulus already there!
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add r8,rax
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adc r9,rdx
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and rbp,r8
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shrd r8,r9,52
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xor r9,r9
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mov rsi,r8
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;; *******************************************************
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common_exit_norm::
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mov rdi,01000003D10h
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mov rax,r15 ; get t5
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mul rdi
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add rax,r10 ; +t0
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adc rdx,0
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mov r10,0FFFFFFFFFFFFFh ; modulus
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mov r8,rax ; +c
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and r10,rax
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shrd r8,rdx,52
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xor r9,r9
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mov rax,rbx ; get t6
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mul rdi
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add rax,r11 ; +t1
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adc rdx,0
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mov r11,0FFFFFFFFFFFFFh ; modulus
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add r8,rax ; +c
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adc r9,rdx
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and r11,r8
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shrd r8,r9,52
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xor r9,r9
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mov rax,rcx ; get t7
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mul rdi
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add rax,r12 ; +t2
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adc rdx,0
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pop rbx ; retrieve pointer to this.a.n
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mov r12,0FFFFFFFFFFFFFh ; modulus
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add r8,rax ; +c
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adc r9,rdx
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and r12,r8
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mov [rbx+2*8],r12
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shrd r8,r9,52
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xor r9,r9
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mov rax,rbp ; get t8
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mul rdi
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add rax,r13 ; +t3
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adc rdx,0
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mov r13,0FFFFFFFFFFFFFh ; modulus
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add r8,rax ; +c
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adc r9,rdx
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and r13,r8
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mov [rbx+3*8],r13
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shrd r8,r9,52
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xor r9,r9
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mov rax,rsi ; get t9
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mul rdi
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add rax,r14 ; +t4
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adc rdx,0
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mov r14,0FFFFFFFFFFFFh ; !!!
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add r8,rax ; +c
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adc r9,rdx
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and r14,r8
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mov [rbx+4*8],r14
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shrd r8,r9,48
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xor r9,r9
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mov rax,01000003D1h
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mul r8
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add rax,r10
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adc rdx,0
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mov r10,0FFFFFFFFFFFFFh ; modulus
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mov r8,rax
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and rax,r10
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shrd r8,rdx,52
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mov [rbx+0*8],rax
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add r8,r11
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mov [rbx+1*8],r8
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ret
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ExSetMult ENDP
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;; Register Layout:
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;; INPUT: rdi = a.n
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;; rsi = this.a
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;; OUTPUT: [rsi]
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;; INTERNAL: rdx:rax = multiplication accumulator
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;; r8:r9 = c
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;; r10-r14 = t0-t4
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;; r15 = a.n[0]*2 / t5
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;; rbx = a.n[1]*2 / t6
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;; rcx = a.n[2]*2 / t7
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;; rbp = a.n[3]*2 / t8
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;; rsi = a.n[4] / t9
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ExSetSquare PROC C PUBLIC USES rbx rbp r12 r13 r14 r15
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push rsi
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mov rsi,0FFFFFFFFFFFFFh
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;; c=a.n[0] * a.n[0]
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mov r15,[rdi+0*8]
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mov r10,rsi ; modulus
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mov rax,r15
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mul rax ; rsi=b.n[0]
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mov rbx,[rdi+1*8] ; a.n[1]
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add r15,r15 ; r15=2*a.n[0]
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mov r8,rax
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and r10,rax ; only need lower qword
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shrd r8,rdx,52
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xor r9,r9
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;; c+=2*a.n[0] * a.n[1]
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mov rax,r15
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mul rbx
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mov rcx,[rdi+2*8] ; rcx=a.n[2]
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mov r11,rsi ; modulus
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add r8,rax
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adc r9,rdx
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and r11,r8
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shrd r8,r9,52
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xor r9,r9
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;; c+=2*a.n[0]*a.n[2]+a.n[1]*a.n[1]
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mov rax,r15
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mul rcx
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add r8,rax
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adc r9,rdx
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mov rax,rbx
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mov r12,rsi ; modulus
|
||||
mul rax
|
||||
mov rbp,[rdi+3*8] ; rbp=a.n[3]
|
||||
add rbx,rbx ; rbx=a.n[1]*2
|
||||
add r8,rax
|
||||
adc r9,rdx
|
||||
|
||||
and r12,r8 ; only need lower dword
|
||||
shrd r8,r9,52
|
||||
xor r9,r9
|
||||
|
||||
;; c+=2*a.n[0]*a.n[3]+2*a.n[1]*a.n[2]
|
||||
mov rax,r15
|
||||
mul rbp
|
||||
add r8,rax
|
||||
adc r9,rdx
|
||||
|
||||
mov rax,rbx ; rax=2*a.n[1]
|
||||
mov r13,rsi ; modulus
|
||||
mul rcx
|
||||
mov rsi,[rdi+4*8] ; rsi=a.n[4] / destroy constant
|
||||
add r8,rax
|
||||
adc r9,rdx
|
||||
and r13,r8
|
||||
shrd r8,r9,52
|
||||
xor r9,r9
|
||||
|
||||
;; c+=2*a.n[0]*a.n[4]+2*a.n[1]*a.n[3]+a.n[2]*a.n[2]
|
||||
mov rax,r15 ; last time we need 2*a.n[0]
|
||||
mul rsi
|
||||
add r8,rax
|
||||
adc r9,rdx
|
||||
|
||||
mov rax,rbx
|
||||
mul rbp
|
||||
mov r14,0FFFFFFFFFFFFFh ; modulus
|
||||
add r8,rax
|
||||
adc r9,rdx
|
||||
|
||||
mov rax,rcx
|
||||
mul rax
|
||||
add rcx,rcx ; rcx=2*a.n[2]
|
||||
add r8,rax
|
||||
adc r9,rdx
|
||||
and r14,r8
|
||||
shrd r8,r9,52
|
||||
xor r9,r9
|
||||
|
||||
;; c+=2*a.n[1]*a.n[4]+2*a.n[2]*a.n[3]
|
||||
mov rax,rbx
|
||||
mul rsi
|
||||
add r8,rax
|
||||
adc r9,rdx
|
||||
|
||||
mov rax,rcx
|
||||
mul rbp
|
||||
mov r15,0FFFFFFFFFFFFFh ; modulus
|
||||
add r8,rax
|
||||
adc r9,rdx
|
||||
and r15,r8
|
||||
shrd r8,r9,52
|
||||
xor r9,r9
|
||||
|
||||
;; c+=2*a.n[2]*a.n[4]+a.n[3]*a.n[3]
|
||||
mov rax,rcx ; 2*a.n[2]
|
||||
mul rsi
|
||||
add r8,rax
|
||||
adc r9,rdx
|
||||
|
||||
mov rax,rbp ; a.n[3]
|
||||
mul rax
|
||||
mov rbx,0FFFFFFFFFFFFFh ; modulus
|
||||
add r8,rax
|
||||
adc r9,rdx
|
||||
and rbx,r8 ; only need lower dword
|
||||
lea rax,[2*rbp]
|
||||
shrd r8,r9,52
|
||||
xor r9,r9
|
||||
|
||||
;; c+=2*a.n[3]*a.n[4]
|
||||
mul rsi
|
||||
mov rcx,0FFFFFFFFFFFFFh ; modulus
|
||||
add r8,rax
|
||||
adc r9,rdx
|
||||
and rcx,r8 ; only need lower dword
|
||||
shrd r8,r9,52
|
||||
xor r9,r9
|
||||
|
||||
;; c+=a.n[4]*a.n[4]
|
||||
mov rax,rsi
|
||||
mul rax
|
||||
mov rbp,0FFFFFFFFFFFFFh ; modulus
|
||||
add r8,rax
|
||||
adc r9,rdx
|
||||
and rbp,r8
|
||||
shrd r8,r9,52
|
||||
xor r9,r9
|
||||
|
||||
mov rsi,r8
|
||||
|
||||
;; *******************************************************
|
||||
jmp common_exit_norm
|
||||
ExSetSquare ENDP
|
||||
end
|
||||
|
||||
|
||||
10
lin64.h
Normal file
10
lin64.h
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
#ifndef _SECP256K1_LIN64
|
||||
#define _SECP256K1_LIN64
|
||||
|
||||
using namespace std;
|
||||
|
||||
#ifdef INLINE_ASM
|
||||
extern "C" void _ExSetMult(uint64_t *, uint64_t *, uint64_t *);
|
||||
extern "C" void _ExSetSquare(uint64_t *, uint64_t *);
|
||||
#endif
|
||||
#endif
|
||||
Loading…
Reference in a new issue