2021-01-09 03:30:07 -03:00
|
|
|
// Copyright 2021 yuzu Emulator Project
|
|
|
|
// Licensed under GPLv2 or any later version
|
|
|
|
// Refer to the license.txt file included.
|
|
|
|
|
|
|
|
#include <algorithm>
|
|
|
|
#include <memory>
|
2021-05-13 23:40:54 -04:00
|
|
|
#include <ranges>
|
2021-02-11 16:39:06 -03:00
|
|
|
#include <vector>
|
2021-01-09 03:30:07 -03:00
|
|
|
|
2021-02-05 23:11:23 -03:00
|
|
|
#include "shader_recompiler/frontend/ir/basic_block.h"
|
2021-02-14 20:15:42 -03:00
|
|
|
#include "shader_recompiler/frontend/ir/post_order.h"
|
2021-01-09 03:30:07 -03:00
|
|
|
#include "shader_recompiler/frontend/maxwell/program.h"
|
2021-03-14 03:41:05 -03:00
|
|
|
#include "shader_recompiler/frontend/maxwell/structured_control_flow.h"
|
2021-01-09 03:30:07 -03:00
|
|
|
#include "shader_recompiler/frontend/maxwell/translate/translate.h"
|
2021-02-02 21:07:00 -03:00
|
|
|
#include "shader_recompiler/ir_opt/passes.h"
|
2021-01-09 03:30:07 -03:00
|
|
|
|
|
|
|
namespace Shader::Maxwell {
|
2021-04-04 04:18:09 -04:00
|
|
|
namespace {
|
2021-05-13 23:40:54 -04:00
|
|
|
IR::BlockList GenerateBlocks(const IR::AbstractSyntaxList& syntax_list) {
|
|
|
|
auto syntax_blocks{syntax_list | std::views::filter([](const auto& node) {
|
|
|
|
return node.type == IR::AbstractSyntaxNode::Type::Block;
|
|
|
|
})};
|
|
|
|
IR::BlockList blocks(std::ranges::distance(syntax_blocks));
|
|
|
|
std::ranges::transform(syntax_blocks, blocks.begin(),
|
|
|
|
[](const IR::AbstractSyntaxNode& node) { return node.block; });
|
|
|
|
return blocks;
|
|
|
|
}
|
|
|
|
|
2021-04-04 04:18:09 -04:00
|
|
|
void RemoveUnreachableBlocks(IR::Program& program) {
|
2021-03-14 03:41:05 -03:00
|
|
|
// Some blocks might be unreachable if a function call exists unconditionally
|
|
|
|
// If this happens the number of blocks and post order blocks will mismatch
|
|
|
|
if (program.blocks.size() == program.post_order_blocks.size()) {
|
|
|
|
return;
|
|
|
|
}
|
2021-04-04 19:00:34 -04:00
|
|
|
const auto begin{program.blocks.begin() + 1};
|
2021-04-04 04:18:09 -04:00
|
|
|
const auto end{program.blocks.end()};
|
2021-05-13 23:40:54 -04:00
|
|
|
const auto pred{[](IR::Block* block) { return block->ImmPredecessors().empty(); }};
|
2021-04-04 04:18:09 -04:00
|
|
|
program.blocks.erase(std::remove_if(begin, end, pred), end);
|
2021-02-02 21:07:00 -03:00
|
|
|
}
|
2021-01-09 03:30:07 -03:00
|
|
|
|
2021-04-04 04:18:09 -04:00
|
|
|
void CollectInterpolationInfo(Environment& env, IR::Program& program) {
|
2021-03-27 04:59:58 -03:00
|
|
|
if (program.stage != Stage::Fragment) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
const ProgramHeader& sph{env.SPH()};
|
|
|
|
for (size_t index = 0; index < program.info.input_generics.size(); ++index) {
|
|
|
|
std::optional<PixelImap> imap;
|
|
|
|
for (const PixelImap value : sph.ps.GenericInputMap(static_cast<u32>(index))) {
|
|
|
|
if (value == PixelImap::Unused) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
if (imap && imap != value) {
|
|
|
|
throw NotImplementedException("Per component interpolation");
|
|
|
|
}
|
|
|
|
imap = value;
|
|
|
|
}
|
|
|
|
if (!imap) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
program.info.input_generics[index].interpolation = [&] {
|
|
|
|
switch (*imap) {
|
|
|
|
case PixelImap::Unused:
|
|
|
|
case PixelImap::Perspective:
|
|
|
|
return Interpolation::Smooth;
|
|
|
|
case PixelImap::Constant:
|
|
|
|
return Interpolation::Flat;
|
|
|
|
case PixelImap::ScreenLinear:
|
|
|
|
return Interpolation::NoPerspective;
|
|
|
|
}
|
|
|
|
throw NotImplementedException("Unknown interpolation {}", *imap);
|
|
|
|
}();
|
|
|
|
}
|
|
|
|
}
|
2021-04-19 15:33:23 -04:00
|
|
|
|
|
|
|
void AddNVNStorageBuffers(IR::Program& program) {
|
|
|
|
if (!program.info.uses_global_memory) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
const u32 driver_cbuf{0};
|
|
|
|
const u32 descriptor_size{0x10};
|
|
|
|
const u32 num_buffers{16};
|
|
|
|
const u32 base{[&] {
|
|
|
|
switch (program.stage) {
|
|
|
|
case Stage::VertexA:
|
|
|
|
case Stage::VertexB:
|
|
|
|
return 0x110u;
|
|
|
|
case Stage::TessellationControl:
|
|
|
|
return 0x210u;
|
|
|
|
case Stage::TessellationEval:
|
|
|
|
return 0x310u;
|
|
|
|
case Stage::Geometry:
|
|
|
|
return 0x410u;
|
|
|
|
case Stage::Fragment:
|
|
|
|
return 0x510u;
|
|
|
|
case Stage::Compute:
|
|
|
|
return 0x310u;
|
|
|
|
}
|
|
|
|
throw InvalidArgument("Invalid stage {}", program.stage);
|
|
|
|
}()};
|
|
|
|
auto& descs{program.info.storage_buffers_descriptors};
|
|
|
|
for (u32 index = 0; index < num_buffers; ++index) {
|
2021-05-01 19:50:27 -04:00
|
|
|
if (!program.info.nvn_buffer_used[index]) {
|
|
|
|
continue;
|
|
|
|
}
|
2021-04-19 15:33:23 -04:00
|
|
|
const u32 offset{base + index * descriptor_size};
|
|
|
|
const auto it{std::ranges::find(descs, offset, &StorageBufferDescriptor::cbuf_offset)};
|
|
|
|
if (it != descs.end()) {
|
2021-05-01 19:50:27 -04:00
|
|
|
it->is_written |= program.info.stores_global_memory;
|
2021-04-19 15:33:23 -04:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
descs.push_back({
|
|
|
|
.cbuf_index = driver_cbuf,
|
|
|
|
.cbuf_offset = offset,
|
|
|
|
.count = 1,
|
2021-05-01 19:50:27 -04:00
|
|
|
.is_written = program.info.stores_global_memory,
|
2021-04-19 15:33:23 -04:00
|
|
|
});
|
|
|
|
}
|
|
|
|
}
|
2021-04-04 04:18:09 -04:00
|
|
|
} // Anonymous namespace
|
2021-03-27 04:59:58 -03:00
|
|
|
|
2021-02-05 23:11:23 -03:00
|
|
|
IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Block>& block_pool,
|
2021-02-11 16:39:06 -03:00
|
|
|
Environment& env, Flow::CFG& cfg) {
|
2021-02-05 23:11:23 -03:00
|
|
|
IR::Program program;
|
2021-05-13 23:40:54 -04:00
|
|
|
program.syntax_list = BuildASL(inst_pool, block_pool, env, cfg);
|
|
|
|
program.blocks = GenerateBlocks(program.syntax_list);
|
|
|
|
program.post_order_blocks = PostOrder(program.syntax_list.front());
|
2021-03-19 19:28:31 -03:00
|
|
|
program.stage = env.ShaderStage();
|
2021-03-28 19:53:34 -03:00
|
|
|
program.local_memory_size = env.LocalMemorySize();
|
2021-04-12 18:41:22 -04:00
|
|
|
switch (program.stage) {
|
2021-04-15 21:46:11 -04:00
|
|
|
case Stage::TessellationControl: {
|
|
|
|
const ProgramHeader& sph{env.SPH()};
|
|
|
|
program.invocations = sph.common2.threads_per_input_primitive;
|
|
|
|
break;
|
|
|
|
}
|
2021-04-12 18:41:22 -04:00
|
|
|
case Stage::Geometry: {
|
|
|
|
const ProgramHeader& sph{env.SPH()};
|
|
|
|
program.output_topology = sph.common3.output_topology;
|
|
|
|
program.output_vertices = sph.common4.max_output_vertices;
|
|
|
|
program.invocations = sph.common2.threads_per_input_primitive;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case Stage::Compute:
|
2021-03-27 03:08:31 -03:00
|
|
|
program.workgroup_size = env.WorkgroupSize();
|
2021-03-28 19:53:34 -03:00
|
|
|
program.shared_memory_size = env.SharedMemorySize();
|
2021-04-12 18:41:22 -04:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
2021-03-27 03:08:31 -03:00
|
|
|
}
|
2021-03-14 03:41:05 -03:00
|
|
|
RemoveUnreachableBlocks(program);
|
|
|
|
|
|
|
|
// Replace instructions before the SSA rewrite
|
2021-02-19 18:10:18 -03:00
|
|
|
Optimization::LowerFp16ToFp32(program);
|
2021-03-14 03:41:05 -03:00
|
|
|
|
|
|
|
Optimization::SsaRewritePass(program);
|
|
|
|
|
2021-02-16 04:10:22 -03:00
|
|
|
Optimization::GlobalMemoryToStorageBufferPass(program);
|
2021-03-08 18:31:53 -03:00
|
|
|
Optimization::TexturePass(env, program);
|
2021-03-14 03:41:05 -03:00
|
|
|
|
|
|
|
Optimization::ConstantPropagationPass(program);
|
|
|
|
Optimization::DeadCodeEliminationPass(program);
|
|
|
|
Optimization::VerificationPass(program);
|
2021-04-04 00:47:14 -04:00
|
|
|
Optimization::CollectShaderInfoPass(env, program);
|
2021-03-27 04:59:58 -03:00
|
|
|
CollectInterpolationInfo(env, program);
|
2021-04-19 15:33:23 -04:00
|
|
|
AddNVNStorageBuffers(program);
|
2021-02-05 23:11:23 -03:00
|
|
|
return program;
|
2021-01-09 03:30:07 -03:00
|
|
|
}
|
|
|
|
|
2021-04-18 19:03:38 -04:00
|
|
|
IR::Program MergeDualVertexPrograms(IR::Program& vertex_a, IR::Program& vertex_b,
|
2021-05-01 08:56:25 -04:00
|
|
|
Environment& env_vertex_b) {
|
|
|
|
IR::Program result{};
|
2021-04-18 19:03:38 -04:00
|
|
|
Optimization::VertexATransformPass(vertex_a);
|
|
|
|
Optimization::VertexBTransformPass(vertex_b);
|
2021-05-01 08:56:25 -04:00
|
|
|
std::swap(result.blocks, vertex_a.blocks);
|
2021-05-13 23:40:54 -04:00
|
|
|
result.blocks.insert(result.blocks.end(), vertex_b.blocks.begin(), vertex_b.blocks.end());
|
2021-05-01 08:56:25 -04:00
|
|
|
result.stage = Stage::VertexB;
|
|
|
|
result.info = vertex_a.info;
|
|
|
|
result.local_memory_size = std::max(vertex_a.local_memory_size, vertex_b.local_memory_size);
|
2021-04-18 19:03:38 -04:00
|
|
|
|
2021-05-01 08:56:25 -04:00
|
|
|
for (size_t index = 0; index < 32; ++index) {
|
|
|
|
result.info.input_generics[index].used |= vertex_b.info.input_generics[index].used;
|
|
|
|
result.info.stores_generics[index] |= vertex_b.info.stores_generics[index];
|
2021-04-18 19:03:38 -04:00
|
|
|
}
|
2021-05-01 08:56:25 -04:00
|
|
|
Optimization::JoinTextureInfo(result.info, vertex_b.info);
|
|
|
|
Optimization::JoinStorageInfo(result.info, vertex_b.info);
|
|
|
|
Optimization::DualVertexJoinPass(result);
|
2021-05-13 23:40:54 -04:00
|
|
|
result.post_order_blocks = PostOrder(result.syntax_list.front());
|
2021-05-01 08:56:25 -04:00
|
|
|
Optimization::DeadCodeEliminationPass(result);
|
|
|
|
Optimization::VerificationPass(result);
|
|
|
|
Optimization::CollectShaderInfoPass(env_vertex_b, result);
|
|
|
|
return result;
|
2021-04-18 19:03:38 -04:00
|
|
|
}
|
|
|
|
|
2021-01-09 03:30:07 -03:00
|
|
|
} // namespace Shader::Maxwell
|